NAIST Guest Lecture at UGM, UI, and IPB January 14-15, 2019

January 14, 2019

NAIST Guest Lecture at UGM, UI, and IPB January 14-15, 2019

UGM, Yogyakarta; IPB, Bogor; UI, Depok

NAIST GUEST LECTURES

– UNIVERSITAS GADJAH MADA (UGM) –
Date: January 14, 2019
Time: 09.00-11.00
Venue: Common Room IUP FMIPA UGM – Sekip Utara, Bulaksumur, Yogyakarta.

– INSTITUT PERTANIAN BOGOR (IPB) –
Date: January 15, 2019
Time: 08.00-10.00
Venue: Ruang Sidang Departemen Biologi, FMIPA IPB – Kampus Darmaga, Bogor.

– UNIVERSITAS INDONESIA (UI) –
Date: January 15, 2019
Time: 15:00-17:00
Venue: Room PC101 Rumpun Ilmu Kesehatan, Fakultas Farmasi UI – Depok.

SPEAKERS:

1. Prof. Yasuhiko Nakashima (Division of Materials Science, NAIST)
Lecture title: “Systolic Arrays as The Last Frontiers”
Abstract:
In this talk, some of my projects related to a supercomputer, a memoization CPU, a heterogeneous multithreading CPU, and systolic arrays are introduced.  However, the benefits of low power consumption and cost reduction by miniaturization of semiconductors are fading away. Therefore, a paradigm shift towards computing infrastructures prioritizing low power and easy-to-estimate performance is arising at the expense of programmability.  Specially, systolic array architecture is one of candidates for such types of still-programmable accelerators and are becoming the last frontier as a digital computers as shown in the case of Google and Wave Computers.  However, the architecture with sufficient local memory and arithmetic resources often leads to a disadvantage in performance per area due to the enormous number of wires connecting many memory blocks and ALUs. For improving the area efficiency of systolic arrays, Our labolatory are now proposing a multithreading mechanism that reduces the number of physical columns and a multichip configuration using a ring structure. The performance of matrix multiplication, convolution operation, and light-field depth extraction are estimated by using a register transfer level simulator including host CPU and the systolic array. After a Verilog HDL description of the systolic array is validated on an SoC including CPU and FPGA, the area and the frequency of the systolic array are evaluated by synthesis in the TSMC 28nm technology and memory generator. Now a prototype system is working on a FPGA system.

2. Prof. Shun Hirota (Division of Materials Science, NAIST)
Lecture title: “Protein Supramolecules: An interdisciplinary research in chemistry and biology”
Abstract:
Supramolecules are complexes of two or more molecules that are not covalently bonded. In 2016, three European researchers won the Nobel Prize in Chemistry for the design and synthesis of molecular machines based on supramolecular chemistry. It is speculated that molecular machines can be used in computing, nanomaterials, and energy storage in the future. Proteins are naturally occurring polypeptides, and now can be dealt with traditional “Chemistry”. They are indispensable for life, and often exist in highly ordered supramolecules. The quaternary structures of protein supramolecules are a prerequisite for their highly specific biological functions. Thus, new researches have been performed to create artificial supramolecular protein assemblies for future nanobio materials. In this lecture, I will introduced our research on construction of protein supramolecules. The relation of protein assemblies with diseases will also be discussed.